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Información tecnológica

versión On-line ISSN 0718-0764

Resumen

DE PABLO, Santiago; CACERES, Santiago; CEBRIAN, Jesús A  y  SANZ, Francisco. Digital Circuit Design at Register Transfer Level using ASM++ Charts. Inf. tecnol. [online]. 2010, vol.21, n.2, pp.91-102. ISSN 0718-0764.  http://dx.doi.org/10.4067/S0718-07642010000200012.

This article shows the close relationship between Algorithmic State Machines (ASM charts) and modern hardware description languages, both applied to digital electronic design. Important improvements on current notation have been proposed in order to develop a compiler capable of processing these charts and generating VHDL or Verilog code automatically, The use of this methodology facilitates the learning of electronic design at the register transfer level (RTL). The language proposed is easy to learn and comprehend with no much difficulty by university students who used it as part of design methodology to produce digital circuits on reconfigurable devices of the type FPGA and CPLD.

Palabras clave : ASM charts; compiler; design methodology; description languages; register transfer level.

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